CN CN108254671A
The invention relates to an interposer based test program evaluation. One example includes a test system (100) that includes a printed circuit board (102) and a switching interposer board (104). The switching interposer board (104) is comprised of a probe point (108), a first bus (112), a second bus (114), and a set of switches (106). Each switch (106) includes a first terminal ("1 COMM"), a second terminal ("2"), and a third terminal ("4"), the first terminal ("1 COMM") being coupled to a respective pin of an integrated circuit device (110), the second terminal ("2") being coupled to the first bus (112), and the third terminal ("4") being coupled to the second bus (114). Each of the set of switches (106) have a first state that selectively couples a pair of the pins of the integrated circuit device (110) to each other through the first bus (112) during a short test, and a second state that selectively couples at least one of the pins of the integrated circuit device (110) to the probepoint through the second bus (114) during a voltage level spike test.
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